1. Field of the Invention
The present invention relates to a semiconductor memory device having a configuration in which data stored in a memory cell is readout to a bit line, and particularly relates to a semiconductor memory device capable of performing a test of read data by controlling an operation of a sense amplifier connected to the bit line and to a test method thereof.
2. Description of Related Art
Generally, in a semiconductor memory device such as a DRAM (Dynamic Random Access Memory), a large number of memory cells are densely arranged with the progress of miniaturization, and therefore there is a case where a failure occurs, such as a short circuit of adjacent memory cells on the same word line. In order to prevent such a failure of memory cells, a test needs to be performed in manufacturing the DRAM to detect the failure. A general test for the DRAM determines whether or not read data is appropriate by transmitting data of a bit line connected to a memory cell to be tested to a sense amplifier, in a state where a predetermined word line is activated. Test methods using the sense amplifier are disclosed, for example, in Patent References 1 and 2.